Key Highlights

- Output Drive Capability: 15 LSTTL Loads

- Outputs Directly Interface to CMOS, NMOS, and TTL

- Operating Voltage Range: 2.0 to 6.0 V

- Low Input Current: 1 A

- High Noise Immunity Characteristic of CMOS Devices

- In Compliance With the JEDEC Standard No. 7 A Requirements

- Chip Complexity: 124 FETs or 31 Equivalent Gates

- NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q100 Qualified and PPAP Capable

- These Devices are Pb-Free and are RoHS Compliant